RME ADI-2 DAC FS固件更新到V35

alexiyan

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alexiyan

Topic: Firmware Updates ADI-2 Pro 250 / 102 and DAC 35 / 35
As already mentioned in this forum the current state for developers and manufacturers is a mixture of hopeless and catastrophy. We face and fight with Corona, a global chip crisis, a never seen before component allocation (translation – unexpectedly cancelled shipments), AKM’s missing chips due to their manufacturing plant burning down, and some more. This all blocks a big amount of time and resources. Consequently the planned firmware updates for Pro and DAC with many improvements and new features are much delayed.
A few days ago we released firmware 249 for the Pro series (and 35 for the DAC series), which bring a completely overhauled SteadyClock. Today we release version 250 (FPGA) and 102 (DSP) for the ADI-2 Pro series, and 35 (DSP) for the ADI-2 DAC. Once working on the firmware we couldn’t hold back and added at least a few, easy to change points from our long list of upcoming stuff.
But let me start with the topic SteadyClock again. If one measures its jitter attenuation over frequency the attenuation will be high at higher jitter frequencies (1 kHz and up), and  lower at frequencies below 200 Hz. The reason is that one needs to follow the incoming clock, and if that one varies slowly or a bit quicker (intentional detuning, varipitch) you don't want to loose sync. But that would happen when the PLL filter – which also defines the jitter attenuation - does not let through such slow changes.
In version 249 (and 35 for the DAC) we finished what we had begun in version 238 (and 34). In those versions the jitter attenuation was 4 x times higher than before, but the PLL a bit unstable in the low frequency area. This is now resolved by adding a special, multiple filter stage of up to 65k samples (1k before, which indeed means 64 times higher filtering), and dynamically switched reaction times on frequency changes. As a result the new SteadyClock acts exactly like before, locks and syncs very quickly, and is able to follow varipitch sample rate changes with no or minimal sync loss. Testing this in detail you won’t find a difference to before. Which is good, as SteadyClock was absolutely unique and simply perfect in this regard.
Now on top of that jitter attenuation has a corner frequency of around 1 Hz, instead of 200 Hz before. That means more than 50 dB jitter reduction also at 50 Hz and similar real-world jitter frequencies (power lines, magnetic fields etc.). Absolutely top-notch for any kind of incoming clock signal. This improvement is added to all Pro models, even the non-FS ones, and all DAC models. Illustrating measurements will be released later.
Furthermore the firmware updates add these features/changes:
Sample Rate Converter (SRC) improvements (all Pro models)
The ISP (Intersample Peak) headroom for the SRC has been reduced from 6 dB to 3 dB. This improves low level accuracy and SNR, and improves low level THD. 6 dB was not necessary (plus  the Pro FS R BE already has 2.5 dB digital headroom).
So far this SRC ISP headroom was available for the analog outputs by turning down the output volume below 0 dB (level meters would clearly show Overs, so dialing volume back in such a case is intuitive and logical. ADI-2 Pro FS R BE and ADI-2 DAC V2 have 2.5 dB additional DAC headroom, so are mostly not affected even at a 0 dB volume setting).
But what about the digital paths, USB Record of the SPDIF/AES input signal and the SPDIF/AES pass-through in Basic Mode Dig Thru? Here the SRC signal clips at the maximum digital signal level, so the additional headroom during SRC conversion is lost again. The new option SRC Gain dig in SETUP / SPDIF / Remap Keys maintains the SRC ISP headroom also for these digital paths (SPDIF/AES In – SRC – USB Record and SPDIF/AES In – SRC – SPDIF/AES Out). Setting this option to -3 dB both digital paths will show -3 dBFS for a full scale sine. And undistorted 0 dBFS if one plays a +3 dBFS test tone through the SRC.
Level meter improvements (ADI-2 Pro FS R BE and ADI-2 DAC V2)
The level meter of  Analog Out 1/2 XLR and TRS rear, as well as the IEM out of the ADI-2 DAC V2, now shows OVR at output levels higher than +2.5 dBFS (before at 0 dBFS). This equals the real overload situation, as these outputs have a digital headroom of +2.5 dB (as mentioned in the manual VOLUME can be upped to +2.5 dB without clipping).
The level meter of Phones Out 1/2 and 3/4 now show OVR at output levels higher than +1 dBFS (before at 0 dBFS). This equals the real overload situation, as these are limited by the analog hardware stages to such a headroom.
Setup Load improvement (all ADI-2 DAC)
Loading a setup does not affect the current sample rate anymore. This feature made sense in the Pro, but not in the DAC, and has therefore been removed.
That’s it. We hope the next big firmware update won’t take too long anymore.

alexiyan

zhxmxm 发表于 2021-9-2 23:11
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